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stimc — a lightweight Verilog-vpi Wrapper for Stimuli Generation

stimc

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stimc is a lightweight Verilog-vpi wrapper to simplify simulation control via c/c++ code similar to SystemC. In contrast to SystemC you can only use stimc together with a Verilog simulator and it is not meant as a standalone hardware description or modelling language. The main Purpose is to control and observe ports of an empty Verilog shell-module via c/c++ code to provide abstract models for external components or emulate functionality of an external software-based access to a hardware component.

stimc was originally created to allow testing of ICGlue generated regfile c/c++ code with generated verilog register files via Icarus Verilog.

Licensing

stimc itself is licensed under the GNU LGPLv3 (see license). But depending on the used coroutine library the derived work might fall under the coroutine library's license. pcl is licensed under GNU GPL, so here the combination is also licensed as GPL, whereas when using libco or boost the combination will be licensed under GNU LGPL.

Acknowledgement

Similar to its origin, ICGlue, a lot of the work was done at the Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (HPSN) at TU Dresden (see HPSN). It is inspired by SystemC.